MOVER-M40 StepperInterface Board
CONTENTS
Physical Layout

The M40R2 stepper interface board provides step signals, limit and miscellaneous inputs, digital outputs, and two analog outputs.  An advanced option provides position verification based on encoder feedback.  The M40R2 is a quad layer daughter board that supports 8 outputs, 15 inputs, 2 analog outputs and multiple step lines.  The circuitry is centered around 2 Cypress 374 CPLDs which are in circuit reprogrammable.

The board is 7 1/4 by 8 inches and mounts on top of the M2280 controller board to minimize space used in the enclosure.  There are
9 mounting holes for use with stand-offs.  See M40R3 Board Layout for component layout.
 

M40R3 Schematics for I/O circuits.
M40R3b Limits
M40R3 Brains
M40R3 Encoder Inputs
M40R3 User Outputs
You will need the Whip Plug-in to view these files. Click on the graphic to download. Download Whip Now

Power Supply

Only a +5V (2.0A) power supply is required.  The power supply voltage(s) are brought to the board at header P1.
P1.2 and P1.1 are the primary power input pins,  the rest of the +5 volt and Ground references are there for wiring convience, and are intended as outputs only.

Power Supply Connections -- P1

PIN DESCRIPTION CURRENT
P1.1 0 volts  Ground
P1.2 +5 volts 3 amp supply / 2 amp minimum
P1.3 Feed CTR
P1.4 +5 volts  
P1.5 0 volts Ground

The current usage listed is only for on-board requirements; off board requirements through the motor and I/O headers can raise the current requirement.
 

Opto Outputs

The M40R2 supports 8  Generation 4  Opto 22 outputs.
When using ODC modules ( D.C. output control modules) the more positive signal must be on the odd numbered output pin.
If the OAC modules light works, but the modules don't conduct, check the +5 Volt supply.  If the supply is low,  odd behaviour results.
 
 

Signal Name Header  Port and controlling Bit
ISO1 SR1: 1 & 2 101:1
ISO2 SR1: 3 & 4 101:2
ISO3 SR1: 5 & 6 101:4
ISO4 SR1: 7 & 8 101:8
ISO5 SR2: 1 & 2 101:16
ISO6 SR2: 3 & 4 101:32
ISO7 SR2: 5 & 6  101:64
ISO8 SR2: 7 & 8 101:128

 

Step Outputs

The M40R2 supports two X's , two Y's, three Z's and 1 theta / Q axis.  Each of the step outputs has a software switch, and each step output and each dir output has an individual driver.  When the 74ALS1034 driver is used, the normal state of the step output is high.  The M40 also supports switchable step delay,  which when enabled, on a change of direction, will delay the first step pulse by 50uS to allow the driver time to prepare for the direction change.  This feature is only necessary on slower drives, and requires a set_pulse_width to be set a 2uS and outputs 2uS pulses.  Setting bit 1 on port 157 enables step delay,  clearing that bit turns step delay off and pass through the pulse width set in set_pulse_width.

! Use only shielded cable for the step and direction lines, and shield the cable only at the M40 board.
 

 Step Outputs -- S1 & S2


 
Signal Name Header Chip Disable Bit  (set bit to disable step line, defaults to no bit=ON)
Step XA S1:1 U21 117:1
Dir X S1:2 U21  - - -
Step YA S1:3 U21 118:1
Dir Y S1:4 U21  - - -
Step Z1 S1:5 U21 119:1
Dir Z S1:6 U21  - - -
Step Q S1:7 U22  - - -
Dir Q S1:8 U22  - - -
Step XB S1:9 U22  117: 2
Dir X S1:10 U22  - - -
Vcc S1:11  - - -  - - -
Gnd S1:12  - - -  - - -
Step Z2 S2:1 U22 119:2
Dir Z S2:2 U22  - - -
Step Z3 S2:3 U23 119:4
Dir Z S2:4 U23  - - -
Step YB S2:5 U23 118:2
Dir Z S2:6 U23  - - -
Vcc S2:7  - - -  - - -
Gnd S2:8  - - -  - - -

 

Note that the maximum pulse rate (including 115% feed rate override) is half the equivalent frequency derived from the pulse width.
The programmed pulse width is used "twice" per step pulse:  once for a direction-line setup and once for the actual step pulse. Thus, when the system is about to generate a step pulse, it changes the direction line, if necessary,for at least the pulse width time (10uS for example), and then generates a 10uS step pulse.   Thus, the absolute maximum frequency is 50 kHz.  The typical system can only be programmed for 40 kHz, to allow for the 115% feed rate override.
 

WARNING: If the user wants to attain the maximum speed for any particular pulse width setting, the system builder must insure that the motor driver has no direction-line hold time requirement and that the driver steps off the leading edge of the step pulse.

WARNING: If the programmed pulse width is below the actual value needed for the motor driver, motion will appear to drift on the machine tool.

Two types of output wave forms are possible.  The first has the direction setup and hold periods centered about the leading edge of the step pulse. The second has the setup and hold centered on the trailing edge.  The first format is the STEP-S option.  The second is the STEP-H option.
 

Recommended Driver Connections

Use a 3 conductor shielded cable.  Shield the cable at the M40 board only.   On the driver,  connect +5,  or  (Step + and Dir +)  to  S1.11 or S2.7 on the M40 board.  When the driver has both  Step + and Dir + instead of +5 volts,  connect  Step + and Dir + together and use the same conductor in the shielded cable.    Connect step or step (-)  to the correct step line on S1 or S2.   Connect  dir or dir (-) to the correct dir line on S1 or S2.
 

Dual X-axis

Output provisions for a second X-axis motor are provided on S1.9 and S1.10.  Also see pulse_enable in the Programmers Reference Manual. Enables bits for each axis are Output Ports OP1.2 and OP1.3 and also mapped to OP117.1 and OP117.2.
 
 
 
 
 
 
 

Limit and Special Inputs
 
 

Limits may be read from Input Port 2 or Port 109.  To Enable a Limit Input to activate a Limit Detect, the corresponding bit in the Limit Mask, Output Port 109 (OP109),must be set high. For example, to enable the first four limit inputs as over-travel switches, write the value 15 to OP109.

Limit Input Connections -- L1


 
PIN DESCRIPTION PIN DESCRIPTION
L1.1  Limit Input 1 L1.2  Limit Input 2
L1.3  Limit Input 3 L1.4  Limit Input 4
L1.5  Limit Input 5 L1.6  Limit Input 6
L1.7  Limit Input 7 L1.8  Limit Input 8
L1.9 Limit Common    

 

Special Input Connections -- L2

 The E-STOP, PAUSE, and miscellaneous inputs also enter via optically isolating receivers, in which the current limiting resisters are also RP1.

Special Inputs may be read from Input Port 1 or Port 111.
 

PIN DESCRIPTION PORT INPUT BIT 
L2.1 Pause Input IP1.2 (2)
L2.2 E-Stop Input IP1.3 (4)
L2.3 Misc 1 Input IP1.4 (8)
L2.4 Misc 2 Input IP1.5 (16)
L2.5 Misc 3 Input IP1.6 (32)
L2.6 Misc 4 Input IP1.7 (64)
L2.7 Misc 5 Input IP1.8 (128)
L2.8 Limit Gnd  
L2.9 Limit Gnd  
NOTE:  That IP1.1 (1) is LLAT (Limit Latched), this flag states whether or not the information read from Input Port 2 (IP2), the limit inputs, is latched or real-time.  Input Port 1 (IP1) is mirrored at IP111; Input Port 2 (IP2) is mirrored at IP109.

NOTE:  To use onboard laser functions, Misc2 is a DOOR-INTERLOCK for the laser. The MISC2 input must be ACTIVE (jumper in place) for the laser to function.

Recommended Limit Cabling

The following table shows the recommended limit switch line connections.  The standard X-axis is called the XA axis, when a second X-axis motor is present it is called the XB motor. A single limit switch for the XB motor is provided for auto-squaring the table.  The Limit Input lines are abbreviated "LI".

Recommended Limit Switch Connections
INPUT LIMIT
XA Low LI1
XA High LI2
XB Low LI7
Y Low LI3
Y High  LI4
Z Low LI5
Z High LI6

NOTE:  The limit inputs lines are noise sensitive.  On the machine tool the limit cables must not be run in the same conduit as (or along with) the cable going to the motors. Keep the limit cables away from any cable with high current or fast voltage swings; also, use shields for limit cables.

NOTE: To conform with the ANSI Robotics standard, the limit Input lines, Pause Input, and E-stop Input must be a closed circuitfor the controller to function. Open-circuits on any of these controls will cause the input line to be triggered.

For normally closed limit switch inputs and for most normally closed sensor-type inputs, a voltage difference across the inputs should be appliedso that current flows through the diode.  A break in current flow will activate the input. Normally closed proximity limit switches should be wired with the source going to the voltage (see RP1 for voltage selection)and the drain side going to the input line on L1 or L2.

The "GO" line convention is to have no current flowing (normally open) so that a break in the line does NOT trigger the event.  The switched voltage source going to the positive side of the switch and thenegative side going to the input line on L2.

Input Noise Filtering

A digital filter running is in the M40R2 circuitry.  This filter will reject input pulses less than 32mS wide.
Pulses will not be detected 100% until they are 65mS wide.

Input Status LED Array

The LED Array contains two green LED bars used to indicate active input status. The LED bars are aligned with the L1 and L2 input connectors.  These LED's indicate a valid connection in the input line. In other words, when a voltage difference (current flow) is present, that channel's LED illuminates.
 
 
 
 
 

Additional Information

The 15 inputs are broken up into 2 groups,  8 limits, and  7 Sip (special inputs). All inputs are optically isolated through ExtraTechs standard HCPL2630 ic.  Electrically, 5mA flows from and external source, through a green LED bar, through the HCPL2630, through a resister network, and then returns through the Limit Ground.  The current flowing in the system can be calculated by

      I    =   (V++  -  1.2   -  1.2)  /  RP1

The inputs are factory configured for either +5, +12V or +24V.  To determine the board's configuration, check resister RP1.
3.3K to 4.7K        =  24 Volt system
1.0K                      = 12 Volt system
220 Ohm              =  5   Volt system

As per industry code, a limits normal state must be a  closed loop (current flowing) .  A lite green LED proves current flow through this loop, and indicates its relative strength.

On the back side of the HCPL2630, ( the digital side) the signals flow to the CPLD U1.  Here the limit signals are digitally filtered and then passed to the controller.  The filters and enhanced latch ensure that only true limits are detected and the triggering limit is latched.  In addition to this, all limits (not sips) are software masked.  The software mask allows the init file to decide which limits cause e-stop.
 
 
 
 
 
 
 
 
 

When limits_off,   reading from 109  gives raw and unfiltered data.
When limits_on,    reading from 109  passes only filtered data, ANDed with the limit mask, who's data is written to by writing to the same locations as the specific limit

Example:

Given :   The Inverter has FAULTED    ( found in this example on the first limit line )

......................................................................................
 limits_off
 109 port_input? .

  yields 1
......................................................................................

 limits_off
 109 0 255 pset_bits
 limits_on
 109 port_input? .

  yields 0      and the machine doesn't HALT
......................................................................................

 limits_off
 109 1 254 pset_bits
 limits_on

  yield    HALTs the machine

 109 port_input? .

  yields 1

 * In this example, the machine would still be blind to
    any other limits because the only allowed limit was 1
......................................................................................

* E-Stop and Pause are filtered and are not maskable
* Only one LimitGround needs to be connected LimitGround.

The Inputs are as follows.
 

Input Name Header HCPL2630 Led Bar Schematic Page Port (bit)
Limit 1 L1:1 U3a Bar1:1 M40R3 Limits 109:1
Limit 2 L1:2 U3b Bar1:2 M40R3 Limits 109:2
Limit 3 L1:3 U4a Bar1:3 M40R3 Limits 109:4
Limit 4 L1:4 U4b Bar1:4 M40R3 Limits 109:8
Limit 5 L1:5 U5a Bar1:5 M40R3 Limits 109:16
Limit 6 L1:6 U5b Bar1:6 M40R3 Limits 109:32
Limit 7 L1:7 U6a Bar1:7 M40R3 Limits 109:64
Limit 8 L1:8 U6b Bar1:8 M40R3 Limits 109:128
LimitGround L1:9  - - -  - - - M40R3 Limits  - - -
Pause L2:1 U7a Bar2:2 M40R3 Limits 111:2
E-Stop L2:2 U7b Bar2:3 M40R3 Limits 111:4
Sip 3 L2:3 U8a Bar2:4 M40R3 Limits 111:8
Sip 4 L2:4 U8b Bar2:5 M40R3 Limits 111:16
Sip 5 L2:5 U9a Bar2:6 M40R3 Limits 111:32
Sip 6 L2:6 U9b Bar2:7 M40R3 Limits 111:64
Sip 7 L2:7 U10a Bar2:8 M40R3 Limits 111:128
LimitGround L2:8  - - -  - - - M40R3 Limits  - - -
LimitGround L2:9  - - -  - - - M40R3 Limits  - - -
Download Whip Now











Encoder Inputs

In order to provide position verification, there are four encoder input headers; PV1 through PV4 (one for each axis).  Connect the encoder outputs to the headers inputs as follows:

Encoder Input Connections -- PV1-PV4
PV1: 1 LCOMMON for Encoder
PV1: 2 Vcc for Encoder
PV1: 3 A
PV1: 4 A  not
PV1: 5 B
PV1: 6 B  not
PV1: 7 V1 ref
PV1: 8 Shield

If the encoders do not have complementary signals (A/ and B/), jumper Encoder Inputs A/ (PVx.4) and B/ (PVx.6) to Voltage Ref (PVx.7).  Otherwise, Voltage Ref should remain unused.
 
 
 
 
 
 
 
 

Digital Outputs

The M40R2 Interface Board supports 4 or 8 isolated outputs.  The outputs can be DC or AC mixed, depending on which type ofmodule is inserted into the base.  The output modules are typically fused for 3 Amps.

The M40R2-OP has eight opto sockets. They are addressable at OP2 and OP101.  The first four opto outputs are in SR1.  They second four opto outputs in SR2.

Output Connections -- SR1
PIN NUMBER FUNCTION PIN NUMBER FUNCTION
SR1.1 Output line 1+ SR1.2 Output line 1-
SR1.3 Output line 2+ SR1.4 Output line 2-
SR1.5 Output line 3+ SR1.6 Output line 3-
SR1.7 Output line 4+ SR1.8 Output line 4-
Output Connections -- SR2
PIN NUMBER FUNCTION PIN NUMBER FUNCTION
SR2.1 Output line 5+ SR2.2 Output line 5-
SR2.3 Output line 6+ SR2.4 Output line 6-
SR2.5 Output line 7+ SR2.6 Output line 7-
SR2.7 Output line 8+ SR2.8 Output line 8-

 
 
 
 
 
 
 
 

Analog Outputs

The M40R2 comes with two Analog Outputs standard.  The output range is from 0V to either 5V or 12V, depending on the Analog Power Supply and the gain resisters RR4/R5 and R7/R8.

The Analog Outputs are designed for reference outputs, they will drive 30mA; they have an output bandwidth of 100 Hz.

The M40R2 is designed to run up to 2 spindles, each with its own driver.  Each driver is set individually.  Both drivers are run from a single chip that is driven from  pulse width modulated signals from CPLD U1.  Each driver can drive a 2k to 600 ohm load.   The driver is a National LMC662 dual Opamp and is labeled U24 on M40R3 schematic 4.  The port for the pulse width modulator is at 121 and 122

Signals for the Spindle control can be found on V1

Analog Output Connections -- V1
PIN NUMBER FUNCTION PIN NUMBER FUNCTION
V1.1 Ground / 0 volts V1.2 Spindle 1 (output)
V1.3 Ground / 0 volts V1.4 Spindle 2 (output)
V1.5 Positive 12 volts V1.6 NC
V1.7 Logic Common V1.8 Reserved, do not connect

 
 
 
 
 
 
 
 

Field Serviceable Components

The following table lists which components are socketted and can be changed in the field to fix a particular failure.
 

LOCATION(S) IC TYPE SIGNAL DESCRIPTION
U3--U10 HCPL2630, 2631 Fault Input Isolated Receiver
U11--U12  SN75175 Encoder Differential Receiver
U13--U20 LS7166 Step and Encoder Counters
U21--U23 74ALS1034 Step Signal Drivers
U24 LMC662 Analog Output Driver
RP1  Resistor Pack Selects Limit Input Voltages

Ordering Information
 

The M40R2 Interface Board is ordered as M40R2 followed by a series of suffixes, such is -NI.  The following table specifies the options and ordering suffixes.
 

SUFFIX OPTION DESCRIPTION
-OP Include additional 4 opto outputs
-5V 5V DC limit inputs
-12V 12V DC limit inputs
-24V  24V DC limit inputs
-PV Include Position Verification Option

 
CONTENTS